文献类型：期刊文献

英文题名：Optimization of GEMV on Intel AVX processor

作者：Liang, Jun[1]; Zhang, Yunquan[2]

机构：[1] Training Center of Electronic Information, Beijing Union University, Beijing, China; [2] State Key Lab of Computer Architecture, Institute of Computing Technology, CAS, Beijing, China

第一机构：北京联合大学工科综合实验教学示范中心

年份：2016

卷号：9

期号：2

起止页码：47-60

外文期刊名：International Journal of Database Theory and Application

收录：EI(收录号：20161002078569);Scopus(收录号：2-s2.0-85035809009)

语种：英文

外文关键词：Memory architecture

摘要：To improve the performance of BLAS 2 GEMV subroutine under the latest instruction set, Intel AVX, this paper presents a new approach to analyze the new generation instruction set and enhance the efficiency of current data-oriented math subroutines. The whole optimizing process involves memory access optimization, SIMD optimization and parallel optimization. Also, this paper shows the comparison between the traditional SSE instruction set and the AVX instruction set. Experiments show that the optimized GEMV function has obtained considerable increase on performance. Compared with the Intel MKL, GotoBLAS, ATLAS, this optimized GEMV exceeds these BLAS implementations from 5% to 10%.