文献类型：会议论文

英文题名：Design of SoC verification system based on multi-FPGA

作者：Xi, Han[1]; Zheying, Li[1]; Yuansheng, Liu[1]; Wenliang, Niu[2]

通讯作者：Xi, H.

机构：[1] College of Information, Beijing Union University, Beijing, China; [2] College of Scientific Technology Application, Beijing Union University, Beijing, China

第一机构：北京联合大学智慧城市学院

通讯机构：[1]College of Information, Beijing Union University, Beijing, China|[1141734]北京联合大学智慧城市学院;[11417]北京联合大学;

会议论文集：Materials Science and Information Technology II

会议日期：August 24, 2012 - August 26, 2012

会议地点：Xi'an, Shaan, China

语种：英文

外文关键词：Design - Information technology - Integrated circuits - Materials science - Programmable logic controllers - Verification

摘要：As one of the most advanced research field, the problem of SoC (System on a Chip) design is getting more and more attention. With the promotion of its theory and technique, SoC verification turns to one of the most significant part in the procedure of realizing a usable integrated circuit. And verification using FPGA (Field Programmable Gate Array) which must obey a set of strict technological process is a kind of general way. With the growing complexity and integrated scale of SoC design, a single FPGA chip could hardly satisfy the verification requirement. Then the method of verification using multi-FPGA is taken and expresses some advantages in some respects. Multi-FPGA verification is still in the initial step situation and has a broad developing space. The architecture of multi-FPGA verification platform is given in this paper, as well as some related key technical problem and solutions. ? (2012) Trans Tech Publications, Switzerland.