文献类型：期刊文献

英文题名：Digital Controller Candidate for Point-of-load Synchronous Buck Converter in Tri-mode Mechanism

作者：Xiu, Li-mei[1,2];Zhang, Wei-ping[3];Li, Bo[4];Liu, Yuan-sheng[2]

第一作者：修丽梅;Xiu, Li-mei

通讯作者：Xiu, LM[1]

机构：[1]Beijing Inst Technol, Sch Informat & Elect, Beijing 100081, Peoples R China;[2]Beijing Union Univ, Coll Informat Technol, Beijing, Peoples R China;[3]North China Univ Technol, Coll Mech & Elect Engn, Beijing, Peoples R China;[4]Chinese Acad Sci, Inst Microelect, Beijing, Peoples R China

第一机构：Beijing Inst Technol, Sch Informat & Elect, Beijing 100081, Peoples R China

通讯机构：[1]corresponding author), Beijing Inst Technol, Sch Informat & Elect, Beijing 100081, Peoples R China.

年份：2014

卷号：14

期号：4

起止页码：796-805

外文期刊名：JOURNAL OF POWER ELECTRONICS

收录：;EI(收录号：20143118000633);Scopus(收录号：2-s2.0-84904621310);WOS:【SCI-EXPANDED(收录号:WOS:000339132600019)】；

基金：This study is supported by the "Program projects of Beijing Municipal Education Commission (SQKM201411417006)" and "The Importation and Development of High-Caliber Talents Project of Beijing Municipal Institutions (IDHT 201304074)."

语种：英文

外文关键词：CMOS integrated circuit; DC-DC converter; Digital control; Digital pulse width modulator; System on-chip

摘要：A digital controller with a low-power approach for point-of-load synchronous buck converters is discussed and compared with its analog counterpart to confirm its feasibility for system integration. The tri-mode digital controller IC in 0.35 mu m CMOS process is presented to demonstrate solutions that include a PID, quarter PID, and robust RST compensators. These compensators address the steady-state, stand-by, and transient modes according to the system operating point. An idle-tone free condition for Sigma-Delta. DPWM reduces the inherent tone noise under DC-excitation. Compared with that of the traditional approach, this condition generates a quasi-pure modulation signal. Experimental results verify the closed-loop performances and confirm the power-saving mechanism of the proposed controller.