文献类型：会议论文

英文题名：Application of DFG model on SOPC technology

作者：Niu, Wenliang[1]; Li, Wenzheng[2]; Yin, Kaishuang[3]

第一作者：钮文良

通讯作者：Niu, W.

机构：[1] College of Scientific Technology Application, Beijing Union University, Beijing, China; [2] College of Software, Beijing University of Technology, Beijing, China; [3] Research and Design Department, Beijing Mokeen Technology Corporation, Beijing, China

第一机构：北京联合大学应用科技学院

通讯机构：[1]College of Scientific Technology Application, Beijing Union University, Beijing, China|[1141775]北京联合大学应用科技学院;[11417]北京联合大学;

会议论文集：Applied Mechanics, Mechatronics Automation and System Simulation

会议日期：June 24, 2012 - June 26, 2012

会议地点：Hangzhou, China

语种：英文

外文关键词：Hardware - Integrated circuits - Optimization - Signal processing

摘要：HW/SW (hardware/software) co-design method based on analysis and optimization of DFG (data flow graphic) model is introduced for SOPC (System on a Programmable Chip) used for digital instrument design in this paper. The method is based on the DFG model of the digital signal process algorithm and implemented with SOPC technology. The DFG model could help designer to divide the function into hardware and software respectively, therefore, the optimizing analysis at system level and circuit level of a SOPC used for portable logic analyzer shows that the DFG model is very useful for not only optimizing architecture and power consumption, but also HW/SW co-design. ? (2012) Trans Tech Publications, Switzerland.