文献类型：期刊文献

中文题名：Optimization of test resources for 3D SoC based on game theory

英文题名：Optimization of test resources for 3D SoC based on game theory

作者：Shao Jingbo[1];Zhao Yue[1];Liu Xiaoxiao[2]

第一作者：Shao Jingbo

机构：[1]College of Computer Science and Information Engineering,Harbin Normal University;[2]Smart City College,Beijing Union University

第一机构：College of Computer Science and Information Engineering,Harbin Normal University

年份：2019

卷号：26

期号：1

起止页码：65-74

中文期刊名：中国邮电高校学报：英文版

收录：Scopus;CSCD:【CSCD2019_2020】；

基金：supported by the Support Project of High-Level Teachers in Beijing Municipal Universities in the Period of the13th Five-Year Plan(CIT&TCD 201704069);the Advanced Research Project for Science and Technology Development of Harbin Normal University(901-220601094);the Natural ScienceFoundationofHeilongjiangProvince(JJ2019LH0418)

语种：英文

中文关键词：3D;SoC;game;theory;test;architecture;test;scheduling

外文关键词：3D SoC;game theory;test architecture;test scheduling

摘要：The ever-increasing complexity of on-chip interconnection poses great challenges for the architecture of conventional system-on-chip(SoC) in semiconductor industry. The rapid development of process technology enables the creation of stacked 3-dimensional(3 D) SoC by means of through-silicon-via(TSV). Stacked 3 D SoC testing consists of two major issues, test architecture optimization and test scheduling. This paper proposed game theory based optimization of test scheduling and test architecture to achieve win-win result as well as individual rationality for each player in a game. Game theory helps to achieve equilibrium between two correlated sides to find an optimal solution. Experimental results on handcrafted 3 D SoCs built from ITC'2 benchmarks demonstrate that the proposed approach achieves comparable or better test times at negligible computing time.
The ever-increasing complexity of on-chip interconnection poses great challenges for the architecture of conventional system-on-chip(SoC) in semiconductor industry. The rapid development of process technology enables the creation of stacked 3-dimensional(3 D) SoC by means of through-silicon-via(TSV). Stacked 3 D SoC testing consists of two major issues, test architecture optimization and test scheduling. This paper proposed game theory based optimization of test scheduling and test architecture to achieve win-win result as well as individual rationality for each player in a game. Game theory helps to achieve equilibrium between two correlated sides to find an optimal solution. Experimental results on handcrafted 3 D SoCs built from ITC'2 benchmarks demonstrate that the proposed approach achieves comparable or better test times at negligible computing time.