文献类型：会议论文

英文题名：A design for test method for combination circuit

作者：Chen, Tingting[1]; Li, Zheying[1]; Sun, Wenyong[2]

第一作者：陈婷婷

通讯作者：Chen, T.

机构：[1] College of Information, Beijing Union University, Beijing, China; [2] Institute of Electronics, Chinese Academy of Sciences, Beijing, China

第一机构：北京联合大学智慧城市学院

会议论文集：2011 International Conference on Computer Science and Service System, CSSS 2011 - Proceedings

会议日期：27 June 2011 through 29 June 2011

会议地点：Nanjing

语种：英文

外文关键词：Testing - Timing circuits

摘要：Based on analysis of measurability design method for JTAG technology, this paper brings forward a Design for Test (DFT) structure for combination circuit, using Boolean Difference Algorithm to generate the minimum test vectors set. A real combination circuit is taken as an example in this paper to prove the correctness of the DFT method by emulation result. ? 2011 IEEE.