文献类型：会议论文

英文题名：Error analysis of integrated resistor attenuation network

作者：Li, Zheying[1]; Xiu, Limei[1]; Liu, Jia[1]; Lv, Chaisia[1]; Li, Shuo[2]

通讯作者：Li, Z.

机构：[1] Institute of Micro Electronic Application Technology, Beijing Union University, Beijing, China; [2] Dept. of Microelectronics and Information Technology, Royal Institute of Technology [KTH], Stockholm, Sweden

第一机构：北京联合大学智慧城市学院

会议论文集：Proceedings - International Conference on Electrical and Control Engineering, ICECE 2010

会议日期：26 June 2010 through 28 June 2010

会议地点：Wuhan

语种：英文

外文关键词：Instruments - Network architecture - Resistors - System-on-chip

摘要：The model and synthesis method of integrated linear attenuation network (LAC) used in mixed signal SoC for digital instrument are addressed in this paper. The model and synthesis method of the LAC used for electronics instrument is related with the application and implementation method. To the signal generator used in some electronics instrument, the LAC architecture could be linear and synthesized by resistor network and some additional circuits. Therefore, the spectrum properties of the LAC are relayed on the spectrum properties of additional circuits. The synthesis method is derived the formula of the LAC model. With the model, the integrated resistor network in the LAC used for measurement circuit module could be reduced. The LAC architecture synthesis method is suitable for the application of implementing a LAC with integrated circuit technology. ? 2010 IEEE.